The present invention relates to a repair circuit of memory device; and, more particularly, to a circuit for detecting a programming state of an antifuse compensating a defective cell of the memory device by using a power stabilization signal or a signal for operating the memory device.
A semiconductor integrated circuit (IC) includes much more circuit devices in a given silicon region as an IC technique has developed. There are needed much more circuit devices so as to reduce or clear defects of these circuit devices. For achieving the higher integration by maximizing the die-availability, a circuit designer tries to reduce the size of an individual circuit device. However, the size reduction may cause the circuit device to be even more affected by a defect resulted from impurities intruded during a manufacturing process. The defect should be checked during a testing procedure after the manufacturing process of ICs, or verified after a semiconductor chip level or package is completed. When the defect, particularly a factual defect exists in a few circuit devices of the ICs, it is economically undesirable to discard the ICs having the defect.
In the manufacturing of ICs, it is impractical to expect a zero defect. Therefore, redundancy circuits are provided to ICs in order to reduce the number of discarded ICs. For instance, if a first device is determined as a defective device, then a redundancy circuit substitutes the defective device. The practical reduction of the number of discarded ICs can be achieved by using the redundancy circuits without increasing the practical cost of IC devices.
There are IC devices such as DRAM, SRAM, VRAM and EPROM, which use the redundancy circuits. A typical IC memory circuit includes a plurality of memories, which are arranged on addressable column and row arrays. The memory arranged on the column and row arrays is the first circuit device of the IC memory circuit. A redundancy circuit can substitute each bit having a defect.
Because the first device of an individual IC memory circuit is differently addressable, in order to repair the defective device, there needs a fuse blowing or an antifuse of a fuse control programmable circuit for programming the redundancy circuit according to an address of the first device. Such process is very effective in permanently substituting the defective device.
For example, in case of a DRAM, a certain memory cell can be selected by a column and row address therefor. A redundancy circuit has to recognize the available first memory circuit device and all signals have to be changed to ones suitable for the redundancy circuit when the addresses for the first memory circuit with the defect is inputted by a user. Therefore, a multiplicity of fuses or antifuses is related to each redundancy circuit. An allowable combination of blown or unblown fuses corresponding to each redundancy circuit represents a single address of all of the first devices replaced by the corresponding redundancy circuit.
An antifuse is a device acting as a switch for connecting two electrodes of an electrode, insulator and electrode structure by using a breakdown. A breakdown voltage of the insulator is called to a program-motive (PGM) voltage of the antifuse, wherein the two electrodes are unblown by programming the antifuse.
It is, therefore, an object of the present invention to provide a repair circuit for programming a signal for compensating a defective cell of a memory device by using an antifuse, and detecting whether the antifuse is programmed or not by using a power stabilization signal.
In accordance with the present invention, there is provided a repair circuit for repairing a defective cell, which comprises: an antifuse programmed by a voltage difference of both ends thereof; a programming circuit for programming the antifuse; a detection circuit for detecting whether the antifuse is programmed or not by using a first and a second power stabilization signal of a power up reset circuit, wherein the detection is performed during a power stabilization period or after the power stabilization period; a latch circuit for latching the result of the detection to thereby generate an output signal; and a redundancy circuit having a redundancy cell for repairing the defective cell in response to the output signal of the latch circuit.